Posted by Colin Warwick
Hi, I’m Colin Warwick, High Speed Digital Design Flow Manager with the Agilent EEsof EDA high speed digital (formerly signal integrity) design flow group. This blog is about tips, tricks, and tutorial to help ensure signal integrity on high speed digital chip-to-chip data links.
A while ago I put in a redirect from the old domain signal-integrity-tips.com to our new home signal-integrity.tm.agilent.com. Please let me know at colin underscore warwick at agilent daht calm if anything is broken. For either one, our Privacy Policy and Terms of Service are the same as Agilent.com.
Thanks for visiting! Please see my blogroll below for other useful sites.
– Colin
Colin’s Blogroll
- EEWeb Electronics Forum
- Bert Simonovich’s blog "Design Notes: Innovative Signal Integrity & Backplane Solutions"
- Eric Bogatin’s blog "What I Learned This Month"
- István Novák’s Electrical Integrity site
- Joe Civello’s RF Design Tips blog
- John Busco’s Semi-Blog
- My other blog: Wizards of Electromagnetism at Chip Design Magazine
- Paul Rako’s Anablog at EDN
- Rick Merritt’s Interconnects blog at EE Times
- SI-List E-mail Reflector
- Subscribe to EDN Magazine
Colin, I would leave it separate from the Agilent site and be clear about your current affiliation. [...] You also have 6 months of inbound links that you might forfeit in the move.
SKMurphy » Updating Your Website? Don’t Forget … // Nov 20, 2009 at 6:55 pm
[...] Nov-20: Colin Warwick suggests “Xenu’s Link Sleuth is another good broken link checker. It’s an app [...]
I like your podcast.
Thanks, Woz5!
Hello Mr . Warwick,
my name is Kavan and I am a student. I found your white paper “Understanding the Kramers-Kronig
Relation Using A Pictorial Proof”.
Very good.
I would like to ask you a few clarifying questions if possible. I am just a beginner.
Let me know if it is feasible,
thanks,
Kavan
Sure! I’ll contact you via email.