Signal Integrity

On High Speed Digital Chip-to-Chip Links

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Video Clip Walks You Through High Speed Digital Design Flow

Posted February 1st, 2012 · Please leave a comment · Video

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We’ve published a video clip that walks you through a high speed digital design flow. Did we get it right? Does this flow resonate with you? Please add your comments and feedback below.

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Agilent Education Forum DesignCon 2012

Posted January 27th, 2012 · Please leave a comment · Seminar

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Here’s a preview of part of our Education Forum at DesignCon 2012. My part is titled Overcome Signal Integrity Challenges in the Multigigabit/s Era. Hope to see you at the live event. We’re giving the full presentation twice: Monday January 30th at 1:30-4:30p and Wednesday February 1st at 8:30-11:30a in the main auditorium at the Santa Clara Convention Center

Overcome Signal Integrity Challenges in the Multigigabit/s Era

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What About the *.ibs File?

Posted December 15th, 2011 · 1 Comment · Application Note

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As you may know we have W1714 SystemVue AMI Modeling Kit to generate the AMI portion of an IBIS model (the *.ami file plus either *.dll on Windows or *.so on Linux) for Channel Simulation. But I often get questions on how to generate the analog part: *.ibs file itself. Or sometimes the question is about how to generate the analog part with no AMI for the traditional IBIS flow, based on SPICE-like transient. At present, Agilent doesn’t offer a solution in this space, but my customers tell me they do one of several things:

  1. Follow the IBIS Cookbook http://www.vhdl.org/pub/ibis/cookbook/cookbook-v4.pdf or
  2. Engage a consultant like Teraspeed http://www.teraspeed.com/ for a measurement-based model
  3. Use a free tool s2ibis (SPICE to IBIS) http://iometh.com/Product/s2ibis3/index.html
  4. Paid tool like SharkSim Developer http://sharksim.com/developer_features.html which is also uses a SPICE to IBIS appraoch

Hope this helps! Please leave a comment if you’d like share your method of generating *.ibs files.

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