Signal Integrity

Power-aware Signal Integrity and EMI/EMC On High-speed Digital Chip-to-Chip Links

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Papers from High-speed Digital Design and Verification Seminar Posted

Posted August 30th, 2013 · Please leave a comment · Technical Paper

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By Colin Warwick

Earlier this year we ran an extensive tour of our High-speed Digital Design and Verification Seminar in over twenty European cities (see map below). We were joined by an impressive list of partner presenters including Xilinx, Micron, TE Connectivity (formerly Tyco Electronics), Thales, and many others. The feedback we recieved was very positive so we’ve posted all the papers at the link above. The titles are:

  • Agilent’s Presentations
    • Welcome and Introduction: Reminder “Design to Prototyping” season 1 & objectives of 2013 seminars
    • Advanced 3D EM analysis for Pre- and Post- Layout PCB design and verification: Anticipate Signal Integrity issue on your High Speed Digital links
    • Explore your design space including IBIS AMI models with Advanced Channel Simulation and Optimization for early evaluation of design trade-offs
    • How to characterize and debug high speed digital links on your physical prototype – what part of your design is eating up your Eye margins? – Part 1
    • How to characterize and debug high speed digital links on your physical prototype – what part of your design is eating up your Eye margins? – Part 2
  • Partner’s Presentations:
    • Xilinx: The Do’s and Don’ts of High Speed Serial Design in FPGAs
    • MathWorks: Developing Customised Measurements and Automated Analysis Routines using MATLAB®
    • Micron: DDR2, DDR3 and DDR4 DRAM, highlighting specific features, performance characteristics and design guidelines that are essential to your design and test decisions
    • TE Connectivity: High-speed connector model validation through EM extraction and correlation with measurements
    • Thales: An Innovative Simulation Workflow for Debugging High-Speed Digital Designs using Jitter Separation
    • D&P Electronic System: Channel Analysis of a High Speed Digital Module and Correlation between Simulation and Measurement

We hope the papers will have value to you in your work.

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