Signal Integrity

EDN editor Paul Rako wrote an article Voices: Signal-integrity experts speak out based on a DesignCon panel that we contributed to:

Preserving signal integrity is a challenge because, at today’s data rates, [you must mitigate] electromagnetic impairments previously only seen in the microwave-frequency range. Attenuation, reflections, and crosstalk must be countered by prelayout- and postlayout-design optimization and by introducing new techniques, such as impedance matching, pre-emphasis, and equalization. Chip-to-chip connections are mini communication systems. It’s a challenge wherever you have chips communicating at high speed.

Larry Lerner, Senior R&D manager at Agilent Technologies’ EEsof division

My colleague Larry Lerner also has a by-line article Viewpoint: Mass GPUs, not CPUs for EDA simulations in EE Times. It’s on a topic I’ve written about here namely accelerating simulations by repurposing GPU hardware. The title the editor chose is a little misleading. I guess “Many-core GPUs supplement multi-core CPUs for EDA simulations” wasn’t provocative enough :

As David A. Patterson, professor of computer science at the University of California at Berkeley, says: “No one knows how to design a 15-GHz processor, so the other option is to retrain all the software developers [to program parallel machines].”

If you enjoyed this post, please spread the word by sharing and bookmarking: