Signal Integrity

On Multigigabit/s Chip-to-Chip Links

Signal Integrity header image 2

Workflow with IBIS Models

July 30th, 2008 · 2 Comments · Video

IBIS (Input/Output Buffer Information Specification) is a behavioral modeling specification for characterizing the inputs and outputs of integrated circuits. This 7 minute video shows how to use them in a signal integrity workflow. The ADS Transient-Convolution Simulator is used to determine the eye diagram and jitter decomposition from a schematic that includes IBIS models from two semiconductor companies (Xilinx and Micron in this example) joined with a channel model consisting of traces and vias.

IBIS Models in ADS

Teraspeed Consulting IBIS Resource page has a comprehensive list of all things IBIS.

If you enjoyed this post, please spread the word by sharing and bookmarking:
[del.icio.us] [Digg] [Facebook] [Google] [LinkedIn] [Twitter] [Email]

Tags: ·····

2 Comments so far ↓

Leave a Comment