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	<title>Comments on: Free Agilent Event: Tackling High-Speed Serial Designs</title>
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	<link>http://signal-integrity.tm.agilent.com/2008/free-agilent-event-high-speed-digital-seminar-tackling-high-speed-serial-designs/</link>
	<description>On High Speed Digital Chip-to-Chip Links</description>
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		<title>By: Eric Bogatin&#8217;s Blog: What I Learned This Month &#187; 9/15/08 Really Cool Events Coming Your Way</title>
		<link>http://signal-integrity.tm.agilent.com/2008/free-agilent-event-high-speed-digital-seminar-tackling-high-speed-serial-designs/comment-page-1/#comment-159</link>
		<dc:creator>Eric Bogatin&#8217;s Blog: What I Learned This Month &#187; 9/15/08 Really Cool Events Coming Your Way</dc:creator>
		<pubDate>Mon, 15 Sep 2008 20:32:14 +0000</pubDate>
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		<description>[...] Sept 16 - Oct 17, there is the  &#8220;High-Speed Digital Seminar - Tackling High-Speed Serial Designs&#8220;. This is a series of presentations on SI issues, like DDR, PCIe, PLLs, Gbps FPGAs and VNA [...]</description>
		<content:encoded><![CDATA[<p>[...] Sept 16 &#8211; Oct 17, there is the  &#8220;High-Speed Digital Seminar &#8211; Tackling High-Speed Serial Designs&#8220;. This is a series of presentations on SI issues, like DDR, PCIe, PLLs, Gbps FPGAs and VNA [...]</p>
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