Signal Integrity

Power-aware Signal Integrity and EMI/EMC On High-speed Digital Chip-to-Chip Links

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Xilinx and Agilent DDR4 at 2400 Mb/s for JEDEC Compliance

Posted April 18th, 2014 · Please leave a comment · Video


Thanks to Xilinx for this video clip featuring my colleague Ai-Lee Grumbine demonstrating our DDR4 compliance app on their demo board with the UltraScale 2400Mb/s DDR4 controller. (Please be patient: the video stream takes a few seconds to buffer.)

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EDN Article Highlights ADS

Posted April 4th, 2014 · Please leave a comment · Article


Thanks to Steve Sandler, CEO of who uses ADS to illustrate several important tips in power distribution network (PDN) design in a recent article in EDN entitled PCB characteristics affect PDN performance.

In particular, Steve highlights importance of matching termination impedances to the characteristic impedance, and the dire consequences of mismatch.

Thanks again, Steve!

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One View into a Schematic or Two?

Posted March 31st, 2014 · 12 Comments · Survey


I came across an ADS feature the other day, and wondered what you think about it. The feature is explained in the video below. Please take a look then come back to this page to vote in the informal, unscientific poll using the radio buttons immediately below the image. Thanks!

What do you think of the ADS multi-view feature shown in the video?

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