Signal Integrity

On High Speed Digital Chip-to-Chip Links

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Efficient End-to-end Simulations of 25G Optical Links

Posted May 11th, 2012 · Please leave a comment · Presentation

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At the IBIS Summit February 2, 2012 (co-located with DesignCon 2012), we published a joint paper with Avago:

Efficient End-to-end Simulations of 25G Optical Links.

My thanks to the authors Sanjeev Gupta and Amolak Badesha of Avago and Fangyi Rao and Jing-tao Liu of Agilent

With the upcoming release of SystemVue 2012 and ADS 2012 we’re including this capability in our products:

  • For model builders we have a SystemVue addon, the W1714 AMI Modeling Kit. The output is in an extended IBIS AMI format.
  • For model consumers we have ADS 2012 High Speed Digital Products that add an extention to IBIS AMI models from SystemVue not only for midchannel repeater but also opto link modeling.
  • In addition we have a lighter, “all-in-one” edition for architects who want to experiment with SERDES, mid-channel repeater, and opto link archicture, but who don’t need to generate models for ADS, nor to design the channel itself in ADS. In this case, you can use a simple S2P file for the channel or co-simulate with ADS if needed. This lighter, “all-in-one” product is called W1713 SerDes Model Library.

We’re very excited to bring these unique capabilities to you and are looking forward to your feedback. Please contact us to evaluate our beta versions. General release is scheduled for the second half of 2012.

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High Speed Digital Simulation and Measurement Seminars in the UK: Winnersh, Manchester, Edinburgh: April 19, 25, 26, 2012

Posted April 11th, 2012 · Please leave a comment · Seminar

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Posted by Colin Warwick

Updated: April 12, 2012.

Seats are limited so register today for our free full day technical seminar delivered Agilent experts in simulation and measurement.

When digital signals reach gigabit speeds, “unpredictable” becomes the normal state of things. The process of getting your project back on track starts with the best tools and methodology for the job.

This seminar will guide you on how to successfully navigate through today’s high speed technology challenges from early design to prototype validation whilst ensuring compliant designs.

Learn all about Signal Integrity challenges in High Speed Digital links and how you can anticipate and reduce these effects on your design.

Who should attend: Engineers and Managers who are responsible for the design or test validation of complex PCBs and systems

  • 19th April in Winnersh
  • 25th April in Manchester
  • 26th April in Edinburgh

Agenda

09:00 Registration
09:30 Welcome
10:45 Why Use Simulation Tools for High Speed Signal Channel Design?
11:30 Break
11.45 Measurement Techniques of Serial Signal and Fast Rise Time Signals
13:00 Lunch & Networking
14:00 BGA Probe Case Study: Using Simulation Models to Extend the Reach of Instrumentation
15:00 A Day in the Life of a Memory System Architect
16:00 Conclusion

For further information on topics or registration, please visit us online or call us 0118 9276201 from the UK or + 44 118 9276201 elsewhere.

My UK colleagues look forward to welcoming you to the seminar.

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Shive Wave Machine Allows Visualization of Wave Properties

Posted April 6th, 2012 · 6 Comments · Video

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Posted by Colin Warwick

Mathematics is great, but for me true comprehension only comes with some kind of visual representation. In this 1959, video Dr. John N. Shive of Bell Labs uses his “Shive wave machine” (a mechanical analog of electrical propagation on transmission lines) to demonstrate:

  • Positive and negative reflection of waves from free and clamped ends
  • Superposition
  • Standing waves, standing wave ratio, and resonance
  • Energy loss by impedance mismatching
  • Reduction of energy loss by quarter-wave and tapered-section transformers
It’s a little longer (26 minutes) than most video clips but it’s worth watching the whole thing because he packs so much in it.

Hat tip to my friend Dick Benson for sharing this gem with me.

Update April, 10 2012

Math behind the analogy

I received a message questioning Shive’s analogy between mechanical free end and electrical short. “Doesn’t a short kind of ‘clamp’ the voltage?” True, but Shive chose to make voltage, V, analogous to force, F, (or torque) not displacement, x. This might not sit well with some folks because voltage is (subjectively) more easily visualized than charge, Q, whereas force is less easily visualized than displacement. But once you get past that, his mapping works out quite nicely:

MechanicalElectromagnetic
x (easily visualized)Q (less easily visualized)
F (less easily visualized)V (easily visualized)
mL
Kinetic:
F = ma = m d2x/dt2		Magnetic:
V = L di/dt = L d2Q/dt2
k1/C
Elastic:
F = kx		Electrostatic:
V = (1/C) Q
Substitute for F:
x = m/k d2x/dt2		Substitute for V:
Q = LC d2Q/dt2
Free end
(big displacement, no force)		Short-circuit termination
(big charge motion, no voltage)
Clamped end
(big force, no displacement)		Open termination
(big voltage, no charge motion)

(I haven’t checked the sign convention so I might a minus sign or three off. This is an ODE for a single oscillator. See an EM textbook for the coupled oscillator PDE version.)

Hungry for more?

I also received several emails that this type of material makes a healthy “digital snack break.” Thanks!

I don’t claim these are Shive’s league by any means, but here is a list of my blog postings that aim to record some “A ha!” moment or another:

Enjoy!

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